#1 Port to Freescale MPC8572DS board

This is a basic port for the Freescale MPC8572DS evaluation board. The board uses the MPC8572 processor (dual e500 core). The latest port includes support for the processor, NOR FLASH, serial port and Giga bit Ethernets. The original patch is divided in 2 pieces. Changes to the PPC architecture ( ID#1000996 ) to support SMP and MPC85xx architecture and newly created file for the MPC8572DS board ( ID#1000986 )

I. Board Startup Sequence (in dual core mode):

When releasing the CPU reset signal, Core0 (primary core) executes its first instruction from the last memory address (0xFFFFFFFC). At this address, a jump instruction to the address 0xFFFFF000 (default 4K boot page) is placed. From this default boot page, the e500 core executes the minimal CPU initialisation before mapping the redboot code located in FLASH (@ 0xEFF00000) to the address 0xFFF00000 using the TLB1:15 entry in address space 1. The e500 core continues setting up the TLBs entries for RAM, FLASH, IMMR etc.. from the virtual address space before jumping back to flash in address space 0. The RAM controller is configured and redboot is relocated (in RAM). From redboot in RAM, the seconday core is released while the primary core proceed to execute the main redboot application code. The total area reserved for redboot is 1MB.

The secondary CPU follows a similar statup sequence. It will however not setup the IOs or copy the redboot code from FLASH to RAM. Once completed with the initialisation code, the seconday core is parked until an SMP kernel enable application releases it.

II. Memory layout:

III. Compiling redboot for SMP enable application:

$ ecosconfig new mpc8572ds redboot
$ ecosconfig import packages/hal/powerpc/quicc3/mpc8572ds/current/misc/redboot_ROMRAM_smp.ecm
$ ecosconfig tree
$ make
In this case, a JTAG debugger is used to configure the NOR FLASH and place it at address 0xE8000000. The redboot.bin binary file is programmed at address 0xEFF00000. Redboot uses the full 1MB space at the flash bottom.

Console output example from Redboot:

IV. Compiling a SMP enable application:

$ ecosconfig new mpc8572ds default
$ ecosconfig import packages/hal/powerpc/quicc3/mpc8572ds/current/misc/net_RAM_smp.ecm
$ ecosconfig tree
$ make

List of files changed / added (diff from ecos public repository) :

  • /hal/powerpc/quicc3/mpc8572ds/current/ChangeLog
  • /hal/powerpc/quicc3/mpc8572ds/current/cdl/hal_powerpc_mpc8572ds.cdl
  • /hal/powerpc/quicc3/mpc8572ds/current/include/hal_diag.h
  • /hal/powerpc/quicc3/mpc8572ds/current/include/pkgconf/*.*
  • /hal/powerpc/quicc3/mpc8572ds/current/include/plf_cache.h
  • /hal/powerpc/quicc3/mpc8572ds/current/include/plf_intr.h
  • /hal/powerpc/quicc3/mpc8572ds/current/include/plf_mem.h
  • /hal/powerpc/quicc3/mpc8572ds/current/include/plf_regs.h
  • /hal/powerpc/quicc3/mpc8572ds/current/include/plf_stub.h
  • /hal/powerpc/quicc3/mpc8572ds/current/misc/net_RAM.ecm
  • /hal/powerpc/quicc3/mpc8572ds/current/misc/net_RAM_smp.ecm
  • /hal/powerpc/quicc3/mpc8572ds/current/misc/net_RAM_smp_wd .ecm
  • /hal/powerpc/quicc3/mpc8572ds/current/misc/reboot_ROM.ecm
  • /hal/powerpc/quicc3/mpc8572ds/current/misc/reboot_ROMRAM.ecm
  • /hal/powerpc/quicc3/mpc8572ds/current/misc/reboot_ROMRAM_smp.ecm
  • /hal/powerpc/quicc3/mpc8572ds/current/src/hal_aux.c
  • /hal/powerpc/quicc3/mpc8572ds/current/src/plf_misc.c
  • /hal/powerpc/quicc3/mpc8572ds/current/src/plf_pm.c
  • /hal/powerpc/quicc3/mpc8572ds/current/src/hal_diag.c
  • /hal/powerpc/quicc3/mpc8572ds/current/src/mpc8572ds.S
  • /hal/powerpc/quicc3/mpc8572ds/current/src/plf_redboot_linux_exec.c

  • /hal/powerpc/quicc3/var/current/ChangeLog
  • /hal/powerpc/quicc3/var/current/cdl/hal_powerpc_quicc3.cdl
  • /hal/powerpc/quicc3/var/current/include/quicc3.h
  • /hal/powerpc/quicc3/var/current/include/var_cache.h
  • /hal/powerpc/quicc3/var/current/include/var_intr.h
  • /hal/powerpc/quicc3/var/current/include/var_mem.h
  • /hal/powerpc/quicc3/var/current/include/var_regs.h
  • /hal/powerpc/quicc3/var/current/include/var_smp.h
  • /hal/powerpc/quicc3/var/current/include/var_type.h
  • /hal/powerpc/quicc3/var/current/include/variant.inc
  • /hal/powerpc/quicc3/var/current/src/Reset.S
  • /hal/powerpc/quicc3/var/current/src/e500.S
  • /hal/powerpc/quicc3/var/current/src/e500_secondary.S
  • /hal/powerpc/quicc3/var/current/src/quicc3_diag.c
  • /hal/powerpc/quicc3/var/current/src/var_intr.c
  • /hal/powerpc/quicc3/var/current/src/var_misc.c
  • /hal/powerpc/quicc3/var/current/src/var_smp.c
  • /hal/powerpc/quicc3/var/current/src/variant.S

  • /hal/powerpc/arch/current/ChangeLog
  • /hal/powerpc/arch/current/cdl/hal_powerpc.cdl
  • /hal/powerpc/arch/current/include/arch.inc
  • /hal/powerpc/arch/current/include/hal_mem.h
  • /hal/powerpc/arch/current/include/hal_smp.h
  • /hal/powerpc/arch/current/include/ppc_regs.h
  • /hal/powerpc/arch/current/src/hal_intr.c
  • /hal/powerpc/arch/current/src/hal_mk_defs.c
  • /hal/powerpc/arch/current/src/powerpc.ld
  • /hal/powerpc/arch/current/src/vectors.S

  • /redboot/current/ChangeLog
  • /redboot/current/cdl/redboot.cdl
  • /redboot/current/src/flash.c

  • /devs/eth/powerpc/mpc8572ds/current/ChangeLog
  • /devs/eth/powerpc/mpc8572ds/current/cdl/mpc8572ds.cdl
  • /devs/eth/powerpc/mpc8572ds/current/include/mpc8572ds_eth.inl
  • /devs/eth/powerpc/tsec/current/ChangeLog
  • /devs/eth/powerpc/tsec/current/cdl/tsec_eth_drivers.cdl
  • /devs/eth/powerpc/tsec/current/include/tsec.h
  • /devs/eth/powerpc/tsec/current/src/tsec.c

  • /devs/flash/powerpc/mpc8572ds/current/ChangeLog
  • /devs/flash/powerpc/mpc8572ds/current/cdl/flash_mpc8572ds.cdl
  • /devs/flash/powerpc/mpc8572ds/current/src/mpc8572ds_flash.c

  • /devs/serial/powerpc/quicc3/current/ChangeLog
  • /devs/serial/powerpc/quicc3/current/cdl/ser_quicc3.cdl
  • /devs/serial/powerpc/quicc3/current/src/ser_quicc3.c
  • /devs/serial/powerpc/quicc3/current/src/ser_quicc3.h